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Do bulk replace of stl types.

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This commit is contained in:
jmsgrogan 2023-12-21 09:18:44 +00:00
parent 521486be62
commit c25a56ee19
531 changed files with 2274 additions and 2181 deletions
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4
plugins/circuits/src/CircuitElement.h
View file

@ -1,7 +1,7 @@
#pragma once
#include <string>
#include <memory>
#include "String.h"
#include "Memory.h"
class CircuitElement

24
plugins/circuits/src/ElectronicCircuit.h
View file

@ -1,13 +1,13 @@
#pragma once
#include <memory>
#include <vector>
#include "Memory.h"
#include "Vector.h"
#include "CircuitElement.h"
#include "LogicGate.h"
#include "Terminal.h"
using LogicGatePtr = std::unique_ptr<LogicGate>;
using LogicGatePtr = Ptr<LogicGate>;
class ElectronicCircuit
{
@ -20,33 +20,33 @@ public:
void addLogicGate(LogicGatePtr gate);
const std::vector<Terminal*>& getInputTerminals() const
const Vector<Terminal*>& getInputTerminals() const
{
return mInputTerminals;
}
const std::vector<Terminal*>& getOutputTerminals() const
const Vector<Terminal*>& getOutputTerminals() const
{
return mOutputTerminals;
}
const std::vector<LogicGate*>& getLogicGates() const
const Vector<LogicGate*>& getLogicGates() const
{
return mLogicGates;
}
const std::vector<Wire*>& getWires() const
const Vector<Wire*>& getWires() const
{
return mWires;
}
private:
std::vector<Terminal*> mInputTerminals;
std::vector<Terminal*> mOutputTerminals;
Vector<Terminal*> mInputTerminals;
Vector<Terminal*> mOutputTerminals;
std::vector<Wire*> mWires;
Vector<Wire*> mWires;
std::vector<LogicGate*> mLogicGates;
Vector<LogicGate*> mLogicGates;
std::vector<std::unique_ptr<CircuitElement> > mElements;
Vector<Ptr<CircuitElement> > mElements;
};

2
plugins/circuits/src/Terminal.cpp
View file

@ -1,6 +1,6 @@
#include "Terminal.h"
Terminal::Terminal(TerminalType type, const std::string& label)
Terminal::Terminal(TerminalType type, const String& label)
: mLabel(label),
mType(type)

8
plugins/circuits/src/Terminal.h
View file

@ -2,7 +2,7 @@
#include "CircuitElement.h"
#include <string>
#include "String.h"
class Wire;
@ -15,7 +15,7 @@ public:
OUTPUT
};
Terminal(TerminalType type, const std::string& label = {});
Terminal(TerminalType type, const String& label = {});
Wire* getConnection() const;
@ -27,8 +27,8 @@ public:
void setConnection(Wire* connection);
private:
std::string mLabel;
String mLabel;
TerminalType mType;
Wire* mConnection{ nullptr };
};
using TerminalPtr = std::unique_ptr<Terminal>;
using TerminalPtr = Ptr<Terminal>;

4
plugins/circuits/src/TruthTable.h
View file

@ -1,12 +1,12 @@
#pragma once
#include <map>
#include <vector>
#include "Vector.h"
class TruthTable
{
public:
using TableData = std::map<std::vector<bool>, std::vector<bool> >;
using TableData = std::map<Vector<bool>, Vector<bool> >;
TruthTable(std::size_t, std::size_t)
//: mNumInputColumns(numInputColumns),

2
plugins/circuits/src/Wire.h
View file

@ -18,7 +18,7 @@ private:
CircuitElement* mInput{ nullptr };
CircuitElement* mOutput{ nullptr };
};
using WirePtr = std::unique_ptr<Wire>;
using WirePtr = Ptr<Wire>;
class Fanout : public CircuitElement
{

6
plugins/circuits/src/gates/LogicGate.cpp
View file

@ -1,6 +1,6 @@
#include "LogicGate.h"
NInMOutLogicGate::NInMOutLogicGate(std::size_t numIn, std::size_t numOut, std::vector<Wire*> inputs, std::vector<Wire*> outputs)
NInMOutLogicGate::NInMOutLogicGate(std::size_t numIn, std::size_t numOut, Vector<Wire*> inputs, Vector<Wire*> outputs)
: LogicGate(),
mNumIn(numIn),
mNumOut(numOut)
@ -11,7 +11,7 @@ NInMOutLogicGate::NInMOutLogicGate(std::size_t numIn, std::size_t numOut, std::v
}
else
{
mInputs = std::vector<Wire*>(numIn, nullptr);
mInputs = Vector<Wire*>(numIn, nullptr);
}
if (outputs.size() == mNumOut)
@ -20,7 +20,7 @@ NInMOutLogicGate::NInMOutLogicGate(std::size_t numIn, std::size_t numOut, std::v
}
else
{
mOutputs = std::vector<Wire*>(numOut, nullptr);
mOutputs = Vector<Wire*>(numOut, nullptr);
}
}

10
plugins/circuits/src/gates/LogicGate.h
View file

@ -4,8 +4,8 @@
#include "TruthTable.h"
#include "Wire.h"
#include <memory>
#include <vector>
#include "Memory.h"
#include "Vector.h"
class LogicGate : public CircuitElement
{
@ -41,7 +41,7 @@ public:
class NInMOutLogicGate : public LogicGate
{
public:
NInMOutLogicGate(std::size_t numIn, std::size_t numOut, std::vector<Wire*> inputs = {}, std::vector<Wire*> outputs = {});
NInMOutLogicGate(std::size_t numIn, std::size_t numOut, Vector<Wire*> inputs = {}, Vector<Wire*> outputs = {});
virtual ~NInMOutLogicGate() = default;
@ -61,8 +61,8 @@ private:
std::size_t mNumIn{ 1 };
std::size_t mNumOut{ 1 };
std::vector<Wire*> mInputs;
std::vector<Wire*> mOutputs;
Vector<Wire*> mInputs;
Vector<Wire*> mOutputs;
};
class TwoInOneOutLogicGate : public NInMOutLogicGate

8
plugins/circuits/src/visuals/ElectronicCircuitNode.h
View file

@ -31,10 +31,10 @@ private:
ElectronicCircuit* mContent{ nullptr };
bool mContentDirty{ true };
std::vector<std::unique_ptr<TerminalNode> > mInputTerminalNodes;
std::vector<std::unique_ptr<TerminalNode> > mOutputTerminalNodes;
std::vector<std::unique_ptr<WireNode> > mWireNodes;
std::vector<std::unique_ptr<LogicGateNode> > mLogicGateNodes;
Vector<Ptr<TerminalNode> > mInputTerminalNodes;
Vector<Ptr<TerminalNode> > mOutputTerminalNodes;
Vector<Ptr<WireNode> > mWireNodes;
Vector<Ptr<LogicGateNode> > mLogicGateNodes;
std::unordered_map<Wire*, CircuitElement*> mWireInputConnections;
std::unordered_map<Wire*, CircuitElement*> mWireOutputConnections;

4
plugins/circuits/src/visuals/LogicGateNode.h
View file

@ -25,6 +25,6 @@ private:
LogicGate* mContent{ nullptr };
bool mContentDirty{ true };
std::unique_ptr<PathNode> mPrimaryPath;
std::unique_ptr<CircleNode> mNegationGlyph;
Ptr<PathNode> mPrimaryPath;
Ptr<CircleNode> mNegationGlyph;
};

4
plugins/circuits/src/visuals/LogicGatePrimitiveShapes.cpp
View file

@ -1,6 +1,6 @@
#include "LogicGatePrimitiveShapes.h"
std::string LogicGatePrimitiveShapes::getAndGateShape()
String LogicGatePrimitiveShapes::getAndGateShape()
{
return "M4 8 h24 a16 16 0 0 1 0 32 h-24Z";
}
@ -24,7 +24,7 @@ Point2 LogicGatePrimitiveShapes::getAndGateConnectionLocation(bool isInput, std:
}
}
std::string LogicGatePrimitiveShapes::getOrGateShape()
String LogicGatePrimitiveShapes::getOrGateShape()
{
return "M4 8 h16 q16 2 24 16 q-12 16 -24 16 h-16 q12 -16 0 -32Z";
}

6
plugins/circuits/src/visuals/LogicGatePrimitiveShapes.h
View file

@ -2,16 +2,16 @@
#include "Point.h"
#include <string>
#include "String.h"
class LogicGatePrimitiveShapes
{
public:
static Point2 getAndGateConnectionLocation(bool isInput, std::size_t idx);
static std::string getAndGateShape();
static String getAndGateShape();
static Point2 getOrGateConnectionLocation(bool isInput, std::size_t idx);
static std::string getOrGateShape();
static String getOrGateShape();
};

2
plugins/circuits/src/visuals/TerminalNode.h
View file

@ -19,7 +19,7 @@ public:
private:
void createOrUpdateGeometry(SceneInfo* sceneInfo);
std::unique_ptr<CircleNode> mMarker;
Ptr<CircleNode> mMarker;
Terminal* mContent{ nullptr };
bool mContentDirty{ true };

2
plugins/circuits/src/visuals/WireNode.cpp
View file

@ -48,7 +48,7 @@ void WireNode::createOrUpdateGeometry(SceneInfo*)
auto loc = mOutputLocation;
loc.moveBy(-mInputLocation.getX(), -mInputLocation.getY(), -mInputLocation.getZ());
std::vector<Point2> points;
Vector<Point2> points;
if (loc.getY() == 0.0)
{

2
plugins/circuits/src/visuals/WireNode.h
View file

@ -26,5 +26,5 @@ private:
Point2 mInputLocation;
Point2 mOutputLocation;
std::unique_ptr<LineNode> mLine;
Ptr<LineNode> mLine;
};